Building Three-Dimensional Chips.

• Position: Brief Article

As the minimum feature size on integrated circuit (IC) chips shrinks and both the size and function of the chip increase, the conventional computer chip is steadily facing fabrication and performance limitations. To combat the problems, microelectronic researchers at Rensselaer Polytechnic Institute, Troy, N.Y., are working on a new approach: build chips up instead of out.

John McDonald and Ronald Gutmann, professors of electrical, computer, and systems engineering, and Jian-Qiang Lu, research assistant professor, are working to create a three-dimensional chip. They are also experimenting with optical and microwave communications on chips to solve problems industry will face more than a decade into the future.

Stacking electronic circuits on top of one another on chips will, according to Gutmann, lead to lower product cost and improved performance. If the wafers are placed side by side, comparatively long metal wires must be used to carry messages from transistors on one chip to those on another. If chips are stacked vertically, however, shorter wires are needed. Lu likens the 3-D approach to building an IC...